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DRC (Design rule checking) Demonstrator Software Engineer - III
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Job Post _ ITEKJP00021570 -Intel Corporation Job Title Software Engineer III Location Hillsboro Oregon USA 97124 Duration- 6 + Months (Probability to extend) Hours per Week: Monday-Friday Shift: 8 AM to 5:00PM Description:- *MRUNDA required - Remote until Covid restrictions are liftedDemonstrate experience in DRC (Design rule checking) rule writing (Calibre/ICV) and algorithmic development in their corresponding development languages.Demonstrate experience in DRC (Design rule checking) development for process design kits (PDK) starting with process design manuals (DRM) in Calibre, ICV and/or both and algorithmic development in their corresponding development languages. Familiarity with layout and/or schematic entry tools such as Cadence Virtuoso and Synopsys Custom Designer. Demonstrate experience in semiconductor device physics, models and technology scaling. Demonstrate familiarity in industry standard CAD tools/flows for digital and/or analog design. Demonstrate experience with software development/programming in high-level languages (e.g. C/C++, TCL, Perl, and Python) Demonstrate experience working on with UNIX/Linux platforms. -Demonstrate good collaboration skills while sharing development tasks.Required Qualifications: Bachelor's degree + 7 years exp or Masters with 5 years exp in Electrical Engineering or Computer Engineering with 2+ years of experience in Design Rule Development with exposure to VLSI design and execution CW's do not need both Calibre and ICV experience-they need one or the other

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