Overview:
TekWissen is a global workforce management provider headquartered in Ann Arbor, Michigan that offers strategic talent solutions to our clients world-wide.
Title: Design Verification Engineers
Work Location: Bay Area , Austin, Dallas
Duration: 6 Months
Job Type: Temporary Assignment
Work Type: Onsite
Job Description:
- Here is the list of skills and qualifications that I need you to look for in candidates. It will be difficult to find DV engineers with all of them.
- The top 6 are must skills and rest are preferred skills, and of course it goes without saying that basic DV skills such as System Verilog/UVM, assertions, coverage, random constraints, etc.
- RISC-V architecture knowledge and verification experience
- VC Formal DPV App (Datapath Verification) which checks the RTL against C/C++ models for arithmetic conformance
- L3 cache coherent system with AXI and CHI interfaces
- C/C++
- Synopsys tools, VCS, VC Formal
- Python based simulation flow
- Wide Vector Unit and a Matmul Unit.
- Formal verification
- SOC System integration is also required, like booting Linux OS
- GLS (Gate Level Simulation)
- Low Power experience (CPF/UPF)
TekWissen Group is an equal opportunity employer supporting workforce diversity.
