Search Jobvertise Jobs
Jobvertise

FPGA/ASIC Verification Engineer - 31975 Direct Hire
Location:
US-MD-Columbia
Jobcode:
5b7de3c5-f4ea-44be-a807-6bd8f6f9b74a
Email Job | Report Job

Report this job





Incorrect company
Incorrect location
Job is expired
Job may be a scam
Other







Apply Online
or email this job to apply later


FPGA/ASIC Verification Engineer - 31975 Direct Hire


Salary Plus Benefits
Locations: Columbia, MD or Rochester NY

US Citizenship required
Onsite


Perform FPGA design verification and validation of embedded electronic communication.
Assist in development of high-level and detailed verification test plans consistent with system requirements and specifications.
Develop self-checking test benches for FPGA design verification and validation using System Verilog.
Develop Agents, Test sequences, Cover groups, Predictors, Scoreboards.
Develop randomized and directed tests to achieve closure on functional coverage and provide feedback to team to reach functional coverage goals.
Develop high-level and detailed verification test plans and test benches consistent with system requirements and specifications.
Work with cross functional teams as needed to define and verify product and design requirements.
Prepare design and implementation reviews. Present technical briefings and status to internal and external customers.
Ability to obtain and maintain US Security Clearance.


Qualifications:

Bachelors Degree and minimum 6 years of prior relevant experience. Graduate Degree and a minimum of 4 years of prior related experience. In lieu of a degree, minimum of 10 years of prior related experience.
Experience developing and verifying FPGA/ASIC based embedded system solutions.


Preferred Additional Skills:

Demonstrated ability to analyze and debug FPGA firmware and related hardware issues.
Working knowledge of Ethernet Standard and design experience related to Ethernet packet processing.
Experience with cryptographic algorithms and cryptographic solutions for embedded communication systems.
Experience with Mentor Graphics Verification tools.
FPGA/ASIC RTL Design experience.
Proficiency in Object Oriented Programming (C++, JAVA).
Proven proficiency in FPGA/ASIC verification using System Verilog.
Working knowledge of UVM/OVM methodology.
Experience with Advanced Functional Verification tools to report functional coverage.
Experience with scripting languages (Bash, Perl, Python, Tcl).
Familiarity in working within Linux OS.

TalentPro Consulting

Apply Online
or email this job to apply later


 
Search millions of jobs

Jobseekers
Employers
Company

Jobs by Title | Resumes by Title | Top Job Searches
Privacy | Terms of Use


* Free services are subject to limitations