Set up and maintain Siemens Veloce emulation and prototyping platforms
Adapt SoC designs for Emulation and Prototyping
Develop and debug emulation testbenches and system-level environments
Support pre-silicon validation, power/performance analysis, and early software bring-up. Participate in silicon bring-up and validation.
Collaborate with design and verification teams to isolate design issues and accelerate debug.
Optimize performance of the emulation workloads and reduce turnaround time.
Work with firmware/software teams to enable use of emulators for OS and driver testing.

5 to 10 years of experience

BS/MS/Ph.D. in EE, CS, or related field with 7+ years of SoC design experience.
Experience with emulation platforms (Veloce, Palladium, or ZeBu) and FPGA-based prototyping systems (proFPGA, HAPS, or Protium)
Experience with emulating high speed I/O interfaces such as PCIe and UCIe and memory technologies such as LPDDR and HBM
Solid understanding of digital design, RTL (Verilog/SystemVerilog), and SoC architecture.
Proficiency in hardware debug tools, waveform viewers, and logic analyzers
Scripting skills (e.g., Python, Tcl, Perl) for automation and infrastructure Development

Familiarity with UVM, simulation, and testbench environments. SystemVerilog and UVM-based verification experience a plus
Hand-on software development experience with C/C++ is a plus