Design Verification Engineer

Austin, TX

6-12 months with possibility of extension (Long term contract)

Pay rate up to $75/h on w2

Only GC or US Citizen (w2 only)

Locals only



Position Details

Vertical: Technical

Description

Infrastructure support for a new CPU, Scalable Interface, and Memory Controller. Tasks will include support of the Design Verification Engineers with regard to EDA software, regression systems, revision control, results databases, and simulation launching scripts. Deliverable / Milestone As assigned by the Infrastructure Lead, including: 1) Enhancements of the simulation launching script written in Perl 2) Debug of regression system as needed 3) Qualification of new EDA tool releases 4) Development of new tools and scripts as needed 5) Debug memory leaks and coredumps as needed 6) Debug user environment issues

Requirements

Background: -BSEE/BSCompE with 5+ years of verification experience -or- MSEE/MSCompE with 3+ years of relevant verification experience -Unix shell programming experience for a processor/chip verification user community required (KSH/CSH/ZSH) -Automation scripting experience or a processor/chip verification user community required (Perl and/or Python) -Demonstrated support experience for a microprocessor or large semi-custom ASIC chip verification user community -Database experience -Revision control experience (Perforce, Git, Subversion) Required Skills: Perl Batch system knowledge (how it works, not the commands) Simulation knowledge Waveform knowledge Regression knowledge Debugging skills Critical thinking skills Repository methodology experience Nice to have: Jenkins Git VCS/Verdi LSF Database knowledge Web app design