Minimum Qualification :

• Minimum 5+ years of experience.


• Strong fundamentals in digital ASIC design; experience using Verilog or VHDL


• Experience with ASIC design/micro-architecture, synthesis, timing/power analysis

• Knowledge of SOC architecture


• Familiarity with high performance and low power design techniques


• Some hands-on experience in DV or PD.


• Knowledge of FPGA, emulation platforms & assertion-based formal verification


• Knowledge or experience in any of the following,  fabric, memory controller, security, caches, coherence, MMU, high speed interfaces/protocols.